Media Alert: Atomera Presenting at the International Conference on Simulation of Semiconductor Processes and Devices 2021 (SISPAD)
September 23, 2021
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2201 N Stemmons Fwy |
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The paper demonstrates that Mears Silicon Technology™ (MST®) facilitates 20-90% higher body conductance, which in turn leads to higher breakdown voltage in scaled devices where the body conductance to body ties at the edge of the switch can limit performance.
The improvements are achieved by using a novel technique for improving partially depleted RFSOI MOSFETs with the use of MST oxygen layers (referred to as OI in the paper) to trap and retain boron doping close to the buried oxide interface and so to form a p+ ground plane. Without MST, the boron is lost to the buried oxide during RFSOI device fabrication.
To facilitate the detailed simulation of these, devices a novel “quasi-3D” process model has been developed and tested against a full 3D simulation. The advantage of the new approach is that it allows reasonable execution time with a much finer 2D cross-sectional mesh than would otherwise be possible, which is particularly important for MST device simulation.
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t: (925)719-1097
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